ChipsAugust 24, 2026via NVIDIA Blog
How XPUs Meet a World-Class AI Factory
Why it matters
As hyperscalers race to build custom XPUs (custom AI accelerators), the economics of AI factories are shifting from individual chip performance to full-stack system efficiency: utilization, power, and delivered throughput. This Nvidia framing—likely positioning NVLink and interconnect strategy—defines what builders and operators should be measuring.
Key signals
- XPU economics defined by: tokens/second, tokens/watt, cost/token, utilization, uptime
- AI factories require full-stack factory design, not individual accelerators
- Hyperscalers and AI-native companies building custom XPUs (Nvidia context piece)
- NVLink ecosystem positioning as interconnect strategy for factory-scale systems
- XPU (custom AI accelerators) economics frame: tokens/second, tokens/watt, cost/token
- Factory-scale optimization (utilization, uptime) vs. individual accelerator specs
- Hyperscalers and AI-native companies targeting custom silicon design
- Nvidia promoting NVLink-Fusion architecture for full-stack factory design
The hook
AI factories aren't won on chips alone—they're won on tokens per watt and cost per token.
To generate intelligence at scale, AI factories run continuously, and their economics are defined by delivered output: tokens per second, tokens per watt, cost per token, utilization and uptime. That requires AI infrastructure designed and built as a full factory, not a collection of individual acc…