ChipsThe story, in brief

Openchip taps Baya Systems data-movement platform for RISC-V systems

RISC-V just got a data-movement upgrade. Openchip is licensing Baya's WeaveIP fabric to build AI chips that move data faster.

Paper-cut illustration of an amber microchip with circuit paths extending into a row of data-center cabinets.
The infrastructure powering AI.AI illustration by KeyNews
The KeyNews take

Why it matters

As AI workloads demand more efficient chip architecture, companies are licensing specialized fabric IP to reduce data-movement bottlenecks—a critical constraint in next-gen AI compute systems.

The key facts

10 to know
  1. Openchip licenses Baya Systems' WeaveIP unified fabric technology

  2. Focus: intelligent compute systems for AI workloads

  3. RISC-V architecture for next-generation AI systems

  4. Data-movement platform (network-on-chip fabric) is the core capability

  5. Partnership indicates growing demand for specialized AI chip fabrics

  6. Openchip licenses Baya Systems' WeaveIP unified fabric for RISC-V systems

  7. Target: next-generation AI workloads and intelligent compute systems

  8. Technology: data-movement platform and network-on-chip fabric

  9. Openchip is EU-based chip and AI systems firm

  10. Baya Systems specializes in semiconductor fabric IP

Go to the source

SiliconAnglesiliconangle.com

Publisher excerpt: Semiconductor fabric intellectual property company Baya Systems Inc. today announced that European chip and artificial intelligence systems firm Openchip & Software Technologies S.L. has licensed its data-movement platform and network-on-chip fabric technology to develop intelligent compute systems…
Read original report
Back to today's editionMore chips news

The wider picture

View all
Paper-cut illustration of an amber microchip with circuit paths extending into a row of data-center cabinets.
AI illustration by KeyNews
Chips01

Google Adds Cycle-Level Kernel Profiling to XProf

A developer-facing tooling improvement that directly enables better TPU utilization and kernel optimization. Practitioners building custom Pallas kernels can now see exactly where cycles are spent, shifting from guesswork to data-driven tuning.

InfoQ AI/ML
Paper-cut illustration of an amber microchip with circuit paths extending into a row of data-center cabinets.
AI illustration by KeyNews
Chips02

Civo unveils first of 40 planned edge data center sites across UK

Edge compute infrastructure is becoming critical for low-latency AI inference and agentic workloads. Civo's distributed network strategy reflects growing demand for regional AI compute capacity outside centralized cloud zones — a structural shift in how AI workloads are deployed.

ITPro
Paper-cut illustration of an amber microchip with circuit paths extending into a row of data-center cabinets.
AI illustration by KeyNews
Chips03

China reviews dependence on Broadcom switches in data centres

China is auditing its reliance on foreign networking hardware for AI data centers as part of a broader push to build domestic alternatives. This reshapes global compute buildout economics and chip supply chains at a moment when AI capacity is the competitive moat.

Financial Times Technology